[kepler-dev] Re: [kepler-cvs] kepler/src/org/sdm/spa ArrayToSequence.java

[Stephen Andrew Neuendorffer]

That looks reasonable, although I'm still not sure that the update port 
really needs a sample delay.

As a parting shot, I'll ask two questions:
1) The reset port is built so that the model tells the component when to 
reset.  But in the model, it will always just count to 2!  Could we design 
a component that counts to a value given by a parameter and then resets 
itself?  Or what if we gave it a predicate (a function: inputs -> boolean) 
that said what inputs to count and another that said when to reset?  This 
might be easier to understand, since the 'stopping condition' is part of 
the design...

2) Finite state machines and modal models can often be used to express 
things like 'reset' very easily.  If you build a synchronous dataflow model 
instead of a process network, then you can put it 'inside' the state of a 
finite state machine and a transition of the finite state machine can 
re-initialize the model when the transition is taken.  This is essentially 
another way of making the 'stopping condition' more explicit in the model: 
it will be the guard of the transition.  Unfortunately, Ptolemy doesn't 
deal well with process networks other than at the toplevel currently, 
although it could.

The point of all this is that control logic in dataflow is often 
awkward:  One of the values of using things like FSM and function closures, 
is that they are sometimes easier to deal with than just plain dataflow.

Steve